The present invention relates to a key storage error testing method which dynamically determines if an error in a storage key of a data processing system results from a hard or soft error.
A data processing system includes a main storage 10 of FIG. 1 which is directly addressable. Both data and programs must be loaded into the main storage 10 from input devices (not shown) before they can be processed. In many systems, such as those using the IBM System/370 architecture, the main storage 10 is available in multiples of blocks 12. In the System/370 architecture, each block is made up of 4 K bytes of storage.
A storage key 14 shown in FIG. 2 is associated with each block 12 of main storage 10. In the storage key 14, bits 0-3 are Access-Control Bits (ACC). If a reference is subject to key-controlled protection, the four ACC bits are matched with a four-bit access key when information is stored, or when information is fetched from a location that is protected against fetching. Bit 4 of the storage key 14 is a Fetch-Protection Bit (F). If a reference is subject to key-controlled protection, the F bit controls whether key-controlled protection applies to fetch-type references. A zero F bit indicates that only store-type references are monitored and that fetching with any access key is permitted. A one F bit indicates that key controlled protection applies to both fetching and storing. No distinction is made between the fetching of instructions and of operands. Bit 5 is a Reference Bit (R). The R bit normally is set to one each time a location in the corresponding storage block 12 is referred to, either for storing or for fetching of information. Bit 6 is a Change Bit (C). The C bit is set to one each time information is stored at a location in the corresponding storage block 12.
Storage keys are not part of addressable storage. In machines having the IBM System/370 architecture, the entire storage key is inspected by the INSERT STORAGE KEY (ISK) instruction. Also in such machines, the RESET REFERENCE BIT (RRB) instruction inspects the reference and change bits and sets the reference bit to zero. The present invention provides for modifying the mentioned instructions to determine if an error in the C bit was caused by a hard error or a soft error.
The memory management of the IBM System/370 architecture by storage keys is well understood in the art, and is described in the IBM SYSTEM/370 EXTENDED ARCHITECTURE PRINCIPLES OF OPERATION, Publication Number SA22-7085-1 available from International Business Machines Corporation, Armonk, N.Y.
The article "REPLACEMENT OF SSK INSTRUCTION IN A PAGING ENVIRONMENT", Burchi et al., IBM Technical Disclosure Bulletin, Vol. 22, No. 5, October 1978, discloses a Reset Change Bit instruction to reset the C bit in the Storage Key to eliminate overhead after each page-in.
The article "PREVENTION OF UNNECESSARY MACHINE CHECKS CAUSED BY REFERENCE AND CHANGE BIT PARITY ERRORS", Hogan et al., IBM Technical Disclosure Bulletin Vol. 22, No. 6, November 1979 discloses a mechanism to signal the data processing system to take a system damage machine check in the event of a parity error in the R or C bits.
U.S. Pat. No. 4,658,356 to Shiozaki et al. for "CONTROL SYSTEM FOR UPDATING A CHANGE BIT", Apr. 14, 1987, discloses a control system which can perform the updating of a C bit faster and which reflects a correct C bit.
U.S. Pat. No. 4,514,847 to Tateishi et al. for "KEY STORAGE ERROR PROCESSING SYSTEM", Apr. 30, 1985 discloses a system wherein parity errors of the R bit or the C bit do not result in system breakdown. When the main storage key is read out, a parity check takes place. If a parity error is detected, the reference bit is set to a value indicating that an access is in progress, and the change bit is set to a value for indicating that a change was made. Further, a parity bit is added and the main storage key is rewritten.